Understand the ASIC design/verification flow to accomplish targets.了解ASIC设计/验证流程,完成设计验证目标• Develop infrastructure and environment for IP/SoC level design verification.为IP/SOC级设计验证开发基础设施和环境• Closely working with Architecture/ Design /Verification team to develop test plans and new verification components.与设计/架构/验证团队紧密合作,开发测试计划和新的验证组件• Develop directed and random verification tests to verify the function and performance for IP/SoC and performance开发定向和随机验证测试用例,以验证IP/SoC功能和性能• Develop verification functional coverage using industry verification methodology使用行业标准覆盖率分析工具/方法开发验证功能覆盖率• Support post-silicon bring-up and debugging支持芯片联调和排错
任职要求
其他说明
Major in Electrical Engineering, Computer Science or related 电子工程、计算机科学或相关专业 • Good understanding of ASIC design and verification methodology 深入理解ASIC设计和覆盖率驱动的验证流程 • Proficiency in Object Oriented programming, computer architecture and data structures 精通面向对象编程、计算机体系结构和数据结构 • Familiar with SystemC/SystemVerilog (SV)/SV Assertion (SVA)/UVM, C++ and scripts such as Python, Perl, Ruby, Make, or similar. 熟悉SC, SV, SVA, UVM, C++ 和脚本编程(Python, Perl, Ruby, Make, or similar) • Familiar with Linux Environment (including shell scripting and Linux gnu tools) 熟悉Linux环境(包括shell脚本和Linux gnu工具)
• Passion to work efficiently and enhance verification methodology and flow 对高效工作和改进当前验证方法和流程充满激情 • Strong interpersonal and communication skills 较强的人际交往和沟通能力 • Verification experience on large ASIC projects is a plus. 有大型ASIC开发项目的验证经验者优先 • Knowledge in formal verification methodology is a plus. 熟悉形式验证方法学者优先。 • knowledge in Computer graphics is a plus. 具有计算机图形学知识者优先。